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LTC3219
OPERATION
to any Stop that appears on the bus with only one excep-
tion, independent of the number of Repeat-Start’s that
have occurred. If a Repeat-Start is given and the LTC3219
successfully acknowledges its address and ?rst byte, it
will not respond to a Stop until all bytes of the new data
have been received and acknowledged.
APPLICATIONS INFORMATION
V BAT , CPO Capacitor Selection
The style and value of the capacitors used with the LTC3219
determine several important parameters such as regulator
control loop stability, output ripple, charge pump strength
and minimum start-up time.
To reduce noise and ripple, it is recommended that low
equivalent series resistance (ESR) ceramic capacitors are
used for both C VBAT and C CPO . Tantalum and aluminum
capacitors are not recommended due to high ESR.
The value of C CPO directly controls the amount of output
ripple for a given load current. Increasing the size of C CPO
will reduce output ripple at the expense of higher start-up
current. The peak-to-peak output ripple of the 1.5x mode
is approximately given by the expression:
Quick Write
Registers REG1 to REG9 can be written in parallel by set-
ting Bit 1 of REG 0 high. When this bit is set high the next
write sequence to REG1 will write the data to REG1 through
REG9 which is all of the universal LED registers.
current. The error signal of the loop is stored directly on
the output capacitor. The output capacitor also serves as
the dominant pole for the control loop. To prevent ringing
or instability, it is important for the output capacitor to
maintain at least 1.6μF of capacitance over all conditions
and the ESR should be less than 80m Ω .
Multilayer ceramic chip capacitors typically have excep-
tional ESR performance. MLCC’s combined with a tight
board layout will result in very good stability. As the value
of C CPO controls the amount of output ripple, the value of
C VBAT controls the amount of ripple present at the input pin,
V BAT . The LTC3219 input current will be relatively constant
while the charge pump is either in the input charging phase
or the output charging phase but will drop to zero during
the clock nonoverlap times. Since the nonoverlap time is
3 f OSC CPO
V RIPPLE P-P =
I OUT
? C
(3)
small (~25ns), these missing “notches” will result in only a
small perturbation on the input power supply line. Note that
a higher ESR capacitor such as tantalum will have higher
where f OSC is the LTC3219 oscillator frequency, typically
850kHz, and C CPO is the output storage capacitor.
The output ripple in 2x mode is very small due to the fact
that load current is supplied on both cycles of the clock.
Both style and value of the output capacitor can signi?cantly
affect the stability of the LTC3219. As shown in the Block
Diagram, the LTC3219 uses a control loop to adjust the
input noise due to the higher ESR. Therefore, ceramic ca-
pacitors are recommended for low ESR. Input noise can be
further reduced by powering the LTC3219 through a very
small series inductor as shown in Figure 4. A 10nH induc-
tor will reject the fast current notches, thereby presenting a
nearly constant current load to the input power supply. For
economy, the 10nH inductor can be fabricated on the PC
board with about 1cm (0.4") of PC board trace.
strength of the charge pump to match the required output
3219fa
15
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